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| 1. general description the IP4788CZ32 is designed to protect hi gh-definition multimedia interface (hdmi) transmitter host interfaces. it includes hdmi 5 v overcurrent / overvoltage protection, display data channel (ddc) buffering and decoupling, hot plug detect, backdrive protection, consumer electronic control (cec) buffering and decoupling, and ? 12 kv contact electrostatic discharge (esd) prot ection for all i/os, far exceeding the iec 61000-4-2, level 4 standard. the IP4788CZ32 incorporates transmission line clamping (tlc) technology on the high-speed transition minimized differential si gnaling (tmds) lines to simplify routing and help reducing impedance discontinuities. all tmds lines are protected by an impedance-matched diode configuration that minimizes impedance discontinuities caused by typical shunt diodes. the enhanced 60 ma overcurrent / overvoltage linear regulator guarantees hdmi-compliant 5 v output voltage levels with up to 6.5 v inputs. the ddc lines use a new buffering concept whic h decouples the internal capacitive load from the external capacitive load for use with standard complementary metal oxide semiconductor (cmos) or low voltage transistor-transistor logic (lvttl) i/o cells down to 1.8 v. this buffering also redrives the ddc and cec signals, allowing the use of longer or cheaper hdmi cables with a higher capacitance. the internal hot plug detect module simplifies the application of the hdmi transmitter to control the hot plug signal. all lines provide appropriate integrated pu ll-ups and pull-downs fo r hdmi compliance and backdrive protection to guarantee that hdm i interface signals are not pulled down when the system is powered down or enters standby mode. only a single external capacitor is required for operation. 2. features and benefits ? hdmi high-speed, 340 mhz, deep color and hdmi ethernet and audio return channel (heac) compatible ? impedance matched 100 ? differential transmission line esd protection for tmds lines ( ? 10 ? ). no printed-circuit board (pcb) pre-compensation required ? simplified flow-throu gh routing utilizing less overall pcb space ? ddc capacitive decoupling between syst em side and hdmi connector side and buffering to drive cable with high capacitive load (> 700 pf/25 m) ? all external i/o lines with esd protection of at least ? 12 kv, far exceeding the iec 61000-4-2, level 4 standard ? low r dyn esd protection on all tmds lines for improved clamping performance IP4788CZ32 dvi and hdmi interf ace esd and overcurrent protection, ddc/cec buffering, hot plug de tect and backdrive protection rev. 1 ? 8 march 2013 product data sheet hvqfn32
IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 2 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection ? hot plug detect module ? cec buffering and isolation, with integrated backdrive-protected 26 k ? pull-up ? robust esd protection without degradation after repeated esd strikes ? highest integration in a small footprint, pcb level, opti mized rf routing, dfn5050-32 package 3. applications ? the IP4788CZ32 can be used for a wide range of hdmi source devices, consumer and computing electronics: ? high-definition (hd) and standard-definition (sd) blu-ray and dvd players ? set-top box ? pc graphic card ? game console ? hdmi picture performance quality enhancer module ? digital visual interface (dvi) 4. ordering information table 1. ordering information type number package name description version IP4788CZ32 dfn5050-32 (hvqfn32) plastic thermal enhanced very thin quad flat package; no leads; 32 terminals; body 5 ? 5 ? 0.85 mm sot617-3 IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 3 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection 5. functional diagram fig 1. functional diagram !" #"$ !# % &' % &' ' ' ! ! ' ' %()*+,- %. $" %. $" /0+ 1)02( $## &&# % &' .3# !!"$& 4+/* 5.! 6 6 6 6 6 6 6 6 0 /1 7 $##8 !" #9# $& & :' ; : ; : ; : ; :' ; :' ; : ; 5 : ; :' ; : ; IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 4 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection 6. pinning information 6.1 pinning 6.2 pin description fig 2. pin configuration IP4788CZ32 /1*/ ))(* < 6 6 6 6 6 6 6 6 ! :' ; %. $" % &' ! $& & %. $" 4 4 5 : ; 5.! = = > ' ? ? > ? ' > = ' ) /+ @/ / table 2. pin description pin name description 1 tmds_d2+_sys tmds to asic inside system 2tmds_d2 ? _sys tmds to asic inside system 3 tmds_d1+_sys tmds to asic inside system 4tmds_d1 ? _sys tmds to asic inside system 5 tmds_d0+_sys tmds to asic inside system 6tmds_d0 ? _sys tmds to asic inside system 7 tmds_ck+_sys tmds to asic inside system 8tmds_ck ? _sys tmds to asic inside system 9 ddc_clk_sys ddc clock system side 10 ddc_dat_sys ddc data system side 11 v cc(5v0) 5 v supply input 12 hotplug_det_con hot plug detect connector side 13 hdmi_5v0_con 5 v overcurrent out to connector IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 5 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection 14 ddc_dat_con ddc data connector side 15 ddc_clk_con ddc clock connector side 16 utility_con utility line esd protection 17 tmds_ck ? _con tmds esd protection to connector 18 tmds_ck+_con tmds esd protection to connector 19 tmds_d0 ? _con tmds esd protection to connector 20 tmds_d0+_con tmds esd protection to connector 21 tmds_d1 ? _con tmds esd protection to connector 22 tmds_d1+_con tmds esd protection to connector 23 tmds_d2 ? _con tmds esd protection to connector 24 tmds_d2+_con tmds esd protection to connector 25 cec_con cec signal connector side 26 esd_bypass esd bias voltage 27 v cc(sys) supply voltage for level shifting 28 cec_stby standby mode control (low for lowest power, cec-only mode) 29 cec_sys cec i/o signal system side 30 n.c. not connected 31 n.c. not connected 32 hotplug_det_sys hot plug detect system side ground pad gnd ground table 2. pin description ?continued pin name description IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 6 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection 7. limiting values [1] connector-side pins (typically d enoted with ?_con? suffix) to ground. [2] device is qualified with cont act discharge pulses of 12 kv according to t he iec 61000-4-2 model and far exceeds the specifi ed level 4 (8 kv contact discharge). [3] system-side pins: cec_sys, ddc_dat_sys, ddc_clk_sys, hotplug_det_sys, cec_stby, v cc(sys) and v cc(5v0) . table 3. limiting values in accordance with the absolute ma ximum rating system (iec 60134). symbol parameter conditions min max unit v cc(5v0) supply voltage (5.0 v) gnd ? 0.5 6.5 v v i input voltage i/o pins gnd ? 0.5 5.5 v v esd electrostatic discharge voltage iec 61000-4-2, level 4 (contact) [1] [2] - ? 12 kv iec 61000-4-2, level 1 (contact) [3] - ? 2kv p tot total power dissipation ddc operating at 100 khz; cec operating at 1 khz; 50 % duty cycle; cec_stby = high; no current at hdmi_5v0_con -50mw ddc and cec bus in idle mode; cec_stby = high; no current at hdmi_5v0_con -3.0mw ddc and cec bus in idle mode; cec_stby = low -1.0mw t amb ambient temperature ? 25 +85 ?c t stg storage temperature ? 55 +125 ?c IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 7 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection 8. static characteristics [1] IP4788CZ32 contains a 5 v voltage regul ator function for higher input voltages. any input voltage of 4.925 v < v cc(5v0) < 6.50 v provides hdmi-compliant output levels of 4.8 v to 5.3 v on hdmi_5v0_con. [1] this parameter is guaranteed by design. [2] capacitive dip at hdmi time domain reflectometer (tdr) m easurement conditions. [3] ansi-esdsp5.5.1-2004, esd sensitivity testing transmission line pulse (tlp) component level method 50 tdr. [4] signal pins: tmds_d0+_con, tmds_d0 ? _con, tmds_d1+_con, tmds_d1? _con, tmds_d2+_con, tmds_d2 ? _con, tmds_ck+_con, tmds_ck ?_con, tmds_d0+_sys, tmds_d0 ? _sys, tmds_d1+_sys, tmds_d1 ? _sys, tmds_d2+_sys, tmds_d2 ? _sys, tmds_ck+_sys and tmds_ck? _sys. [5] backdrive current from tmds_x_sys and tmds_x_con pins to local v cc(5v0) bias rail at power-down. device does not block backdrive current leakage th rough the device to/from asic i/o pins connected to tmds_x_sys pins. table 4. supplies t amb = ? 25 ? c to +85 ? c unless otherwise specified. symbol parameter conditions min typ max unit v cc(5v0) supply voltage (5.0 v) [1] 4.55.06.5v v cc(sys) system supply voltage 1.62 3.3 5.5 v table 5. tmds protection circuit t amb = ? 25 ? c to +85 ? c unless otherwise specified. symbol parameter conditions min typ max unit tmds channel z i(dif) differential input impedance tdr measured; t r =200ps 90 100 110 ? c eff effective capacitance equivalent shunt capacitance for tdr minimum; t r =200ps [1] [2] -0.6-pf protection diode v brzd zener diode breakdown voltage i=1.0ma 6.0 - 9.0 v r dyn dynamic resistance tlp positive transient [3] -0.5- ? negative transient [3] -0.4- ? i bck back current v cc(5v0) IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 10 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection cec_con [1] v ih high-level input voltage 2.0 - - v v il low-level input voltage - - 0.80 v v oh high-level output voltage 2.88 3.3 3.63 v v ol low-level output voltage i ol = 1.5 ma - 100 200 mv c io input/output capacitance v cc(5v0) =0v; v cc(sys) =0v; v bias =2.5v; ac input = 3.5 v (p-p) ; f=100khz [2] -8 . 01 0p f r pu pull-up resistance 23.4 26.0 28.6 k ? cec_sys [1] [4] v ih high-level input voltage v cc(sys) =1.8v 450 - - mv v cc(sys) =2.5v 620 - - mv v cc(sys) =3.3v 760 - - mv v cc(sys) =5.0v 800 - - mv v il low-level input voltage v cc(sys) = 1.8 v - - 330 mv v cc(sys) = 2.5 v - - 380 mv v cc(sys) = 3.3 v - - 400 mv v cc(sys) = 5.0 v - - 420 mv v oh high-level output voltage [2] v cc(sys) ? 0.02 - v cc(sys) +0.02 v v ol low-level output voltage v cc(sys) = 1.8 v - 490 500 mv v cc(sys) = 2.5 v - 640 690 mv v cc(sys) = 3.3 v - 675 770 mv v cc(sys) = 5.0 v - 710 800 mv c io input/output capacitance v cc(5v0) =0v; v cc(sys) =0v; v bias =2.5v; ac input = 3.5 v (p-p) ; f=100khz [2] -6 . 07 . 0p f r pu pull-up resistance 8.5 10 11.5 k ? hotplug_det_con [1] v ih high-level input voltage 2.0 - - v v il low-level input voltage - - 0.8 v r pd pull-down resistance 60 100 140 k ? c i input capacitance v cc(5v0) =0v; v cc(sys) =0v; v bias =2.5v; ac input = 3.5 v (p-p) ; f=100khz [2] -8 . 01 0p f table 8. static characteristics ?continued t amb = ? 25 ? c to +85 ? c unless otherwise specified. symbol parameter conditions min typ max unit IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 11 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection [1] the device is active if the input volt age at pin cec_stby is above the high level. [2] this parameter is guaranteed by design. [3] capacitive load measured at power-on. [4] no external pull-up resistor attached. [1] the cec_stby pin should be connected permanently to v cc(5v0) or v cc(sys) if no enable control is needed. [2] ddc buffers, hot plug detect (hpd) buffer, and hdmi_5v0_con out enabled; cec buffer enabled. [3] ddc buffers, hpd buffer, and hdmi_5v0_con out disabled; cec buffer enabled. hotplug_det_sys [1] v oh high-level output voltage i ol =1ma 0.7 ? v cc(sys) -- v v ol low-level output voltage i ol = ? 1 ma - 200 300 mv r pd pull-down resistance 60 100 140 k ? table 8. static characteristics ?continued t amb = ? 25 ? c to +85 ? c unless otherwise specified. symbol parameter conditions min typ max unit table 9. cec_stby powe r management circuit v cc(sys) = 1.62 v to 5.5 v; v cc(5v0) = 4.5 v to 6.5 v; gnd = 0 v; t amb = ? 25 ? c to +85 ? c unless otherwise specified. symbol parameter conditions min typ max unit board side: input pin cec_stby [1] v ih high-level input voltage high = active [2] 1.2 - 6.5 v v il low-level input voltage low = standby [3] ? 0.5 - 0.8 v r pd pull-down resistance 60 100 140 k ? c i input capacitance v i =3v or 0v - 67pf IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 12 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection 9. dynamic characteristics [1] all dynamic measurements are done with a 75 pf load. ri se times are determined by internal pull-up resistors. table 10. dynamic characteristics v cc(5v0) =5.0v; v cc(sys) = 1.8 v; gnd = 0 v; t amb = ? 25 ? c to +85 ? c unless otherwise specified. symbol parameter conditions min typ max unit ddc_dat_sys, ddc_clk_sys, ddc_dat_con, ddc_clk_con [1] t plh low to high propagation delay system side to connector side figure 10 -80-ns t phl high to low propagation delay s ystem side to connector side figure 10 -60-ns t plh low to high propagation delay c onnector side to system side figure 11 -120-ns t phl high to low propagation delay c onnector side to system side figure 11 -80-ns t tlh low to high transition time connector side figure 12 -150-ns t thl high to low transition time connector side figure 12 -100-ns t tlh low to high transition time system side figure 13 -250-ns t thl high to low transition time system side figure 13 -80-ns t r = 200 ps; no filter; v cc(5v0) =5v 100 ? differential (ch1 + ch2) fig 3. differential tdr plot ? ' > ) :1; a 7 7 a 7 :; :; :; IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 13 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection 227 mhz pixel clock horizontal scale: 90 ps/div vertical scale: 200 mv/div offset: 42.6 mv fig 4. eye diagram using IP4788CZ32 (1080p, 12 bit) 297 mhz pixel clock horizontal scale: 67.5 ps/div vertical scale: 200 mv/div offset: 42.6 mv fig 5. eye diagram using IP4788CZ32 (1080p, 16 bit) IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 14 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection t p = 100 ns; tlp; tmds pins t p = 100 ns; tlp; tmds pins fig 6. dynamic resistance with positive clamping fig 7. dynamic resistance with negative clamping (1) 5.3 v; maximum values; hdmi cts tid 7-11 (2) 4.8 v; minimum values; hdmi cts tid 7-11 (3) i = 0 ma (4) i = 55 ma (5) v cc(5v0) supply input; 4.925 v to 6.5 v (1) v cc(5v0) =4.5v (2) v cc(5v0) =5.0v (3) v cc(5v0) =5.5v (4) v cc(5v0) =6.5v fig 8. overvoltage limiter function (hdmi_5v0_con) fig 9. overcurrent limiter function (hdmi_5v0_con) ? ' ' = ' ' ' :; & & :!; :!; :!; = ' ? ' ' = ' ' ' :; & & :!; :!; :!; 018aaa095 v cc(5v0) (v) 5.0 6.5 6.0 5.5 5.5 5.0 6.0 6.5 v i (v) 4.5 (1) (5) (4) (3) (2) i o (a) 0.00 0.04 0.08 0.12 0.14 0.10 0.06 0.02 018aaa096 2.0 4.0 6.0 v o (v) 0.0 (1) (4) (3) (2) IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 15 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection 10. ac waveforms 10.1 ddc propagation delay fig 10. propagation delay ddc, ddc sys tem side to ddc connector side fig 11. propagation delay ddc, ddc co nnector side to ddc system side 018aaa097 ddc system side ddc connector side v cc(sys) 0.5 v (hdmi_5v0_con) 0.28 v cc(sys) v ol v ol 0.5 v (hdmi_5v0_con) t phl t plh 0.5 v cc(sys) v (hdmi_5v0_con) 018aaa098 ddc system side ddc connector side v cc(sys) 0.5 v (hdmi_5v0_con) v ol v ol 0.5 v (hdmi_5v0_con) t phl t plh 0.5 v cc(sys) 0.5 v cc(sys) v (hdmi_5v0_con) IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 16 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection 10.2 ddc transition time fig 12. transition ti me ddc connector side fig 13. transition time ddc system side 018aaa099 ddc system side ddc connector side v ol v (hdmi_5v0_con) 80 % v (hdmi_5v0_con) 20 % v (hdmi_5v0_con) v cc(sys) v ol t phl t plh 018aaa100 ddc system side ddc connector side v cc(sys) 80 % v cc(sys) 20 % v cc(sys) v ol v ol t phl t plh v (hdmi_5v0_con) IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 17 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection 11. application information 11.1 hdmi connector side esd protection all pins directly interfacing with the hdmi connector provide up to 12 kv contact esd protection according to iec 61 000-4-2, exceeding level 4. in order to utilize the full scope of this protection, connect all connector side pins to the hdmi connector. 11.2 tmds esd to protect the tmds lines and also to comp ly with the impedance requirements of the hdmi specification, ip 4788cz32 provides esd protection with matched tlc esd structures. typical dual rail clamp (drc) or rail-to-rail shunt structures are common for low-capacitance esd protection (as shown on the left side of figure 14 ) where the dominant factor for the tmds line impedance dip is determined by the capacitive load to ground. parasitic lead inductances of the packaging in this case works against the esd clamping pe rformance by including the ? i/? t reactance of the inductance into the path of the esd shunt. in order to present an effective capacitive load of roughly only 0.7 pf, IP4788CZ32 utilizes these inherent inductances in series with the transmission line. this tlc structure minimizes the capacitive dip, for ideal signal integrity ( figure 14 ; right side) without complicated pcb pre-compensation. as a benefic ial side effect, this structure enhances the esd performance of the device as well. the reactance of the series inductance attenuates the fast initial peak of the esd pul se for a lower residual pulse delivered to the application specific in tegrated circuit (asic). a. classic parallel esd shunt protection b. improved series shunt tlc clamping fig 14. tlc esd protection of tmds lines 018aaa101 018aaa102 IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 18 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection 11.3 operating and standby modes the operating mode of ip 4788cz32 depends on th e availability of the v cc(5v0) and v cc(sys) supply voltages and on the state of the cec_stby input signal. without availability of both supplies, ip4788cz3 2 is in standby mode. as soon as v cc(5v0) and v cc(sys) are within the range specified in section 8 , the part is in an operating mode that can be controlled via the cec_stby input signal. in case cec_stby is low, only the cec buffer is active and enabled to receiv e or send cec commands. all other outputs are in a high-ohmic state. a high input signal enables all parts of IP4788CZ32 and puts the device into full operating mode. [1] x = don?t care (either low or high level); l = low-level input; h = high-level input if no cec standby mode is required, or if no special power-down modes are desired, the cec_stby pin can be pulled high to v cc(5v0) or v cc(sys) for continuous hdmi and cec operation as soon as the supplies are available. strapping the cec_stby = v cc(sys) =v dd of asic guarantees that all interface signals ending with the suffix ?_sys? on th e system side are disabled when v cc(sys) goes low. this configuration protects the asic i/ o signals from exce eding its local v dd . in this mode, even if v cc(5v0) is powered, hdmi_5v0_con goes active and hot plug events can be detected only when the asic power supply rail is on. strapping cec_stby = v cc(5v0) is the most basic configuration where the buffers are enabled whenever the local v cc(5v0) and v cc(sys) supplies reach minimum operating levels. table 11. ip4787cz32 operating modes v cc(sys) v cc(5v0) cec_stby [1] mode description < 1.1 v < 4.5 v x standby mode all outputs high-ohmic ? 1.1 v ? 4.5 v l cec standby mode cec circuit active; all other outputs high-ohmic h full operating m ode all functional blocks active IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 19 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection 11.4 ddc circuit the ddc bus circuit integrates all required pull-ups, and provides full capacitive decoupling between the hdmi connector and the ddc bus lines on the pcb. the capacitive decoupling ensures that the maximu m capacitive load is well within the 50 pf maximum of the hdmi specific ation. no external pull-ups or pull-downs are required. the bidirectional buffers support high-capacit ive load on the hdmi cable-side. various non-compliant but prevalent low-cost cables ha ve been observed. they have a capacitive load of up to 6 nf on the ddc lines, far exceeding the 700 pf hdmi limit. IP4788CZ32 can easily decouple this from the weaker asic i/o buffers, and drive the rogue cable successfully. a. ddc clock b. ddc data fig 15. ddc circuit 1.85 k 3.65 k esd_bypass ddc_clk_con ddc_clk_sys hdmi_5v0_con v cc(sys) 018aaa103 1.85 k 3.65 k esd_bypass ddc_dat_con ddc_dat_sys hdmi_5v0_con v cc(sys) 018aaa104 (1) valid i 2 c signaling example on the cable (c onnector side) from 5 v (high) to approximately 1 v (low). (2) valid logic-level signaling example to the asic (system side) from 1.8 v (high) to approximately 0.5 v (low). fig 16. ddc level shifting waveform example 5 4 3 2 1 0 time v (1) (2) 018aaa105 IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 20 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection 11.5 logic low i 2 c voltage shifter the ddc buffers provide an additional feat ure commonly required for high-integration hdmi asics. in order to be compatible with the 5 v i 2 c standard used for ddc communication, i/o buffer cells of many hdmi modern transmitter chips require level shifting. as fet-based level shifting just lim its the high level of the signal, the low level remains unchanged. as a result, the low-level voltages on the ddc bus often exceed the 0.3 v dd low-level in put voltage (v il ) limit of low-voltage i/o buffers. to enable proper operation that is independen t of the system side i/o voltage, the ddc buffers inside IP4788CZ32 shift both the high and the low levels by the required amount. this ensures that low levels on the system side dd c bus match the low-level input voltage requirements down to i/o voltages of 1.8 v. besides the ddc buffers, this feature is also included in the cec buf fer, allowing standard i/o buffer cells to be used in hd mi asics and microcontrollers. (1) v ol(max) driven to system (asic) side when i 2 c logic low (less than 0.3 ? hdmi_5v0_con) (2) v ih(min) threshold on system (asic) side to drive i 2 c logic low (3) v il(max) threshold on system (asic) side to drive i 2 c logic low fig 17. logic voltage thresholds as a function of supply voltage; on connector (hdmi) side 018aaa106 v cc(sys) (v) 1.6 5.6 4.6 3.6 2.6 0.5 0.7 0.9 v ol ;v ih ; v il (v) 0.3 (1) (3) (2) IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 21 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection 11.6 hot plug detect circuit and heac support IP4788CZ32 includes a hot plug detect circui t which simplifies the hot plug application. the circuit generates a standard logi c level from the hot plug signal. the hot plug detect circuit is pulling down the signal to avoid any floating signal. the comparator guarantees a save detection of the 2 v hot plug signal without any glitches or oscillation at the hot plug output. IP4788CZ32 also provides an additional esd pin to protect the reserved / heac pin along with hot plug detect to 12 kv iec 61000-4-2. 11.7 cec the logical multidrop topology of the cec bus can include complex physical stubs, loading cables, and interconnects which may deteriorate signal quality. the IP4788CZ32 includes a full bidirectional buffer to drive the cec bus and isolate the cec microcontroller or asic ge neral-purpose input/output (gpio). the cec buffer derives power from an on-board 3.3 v regulator from the v cc(5v0) domain (see figure 19 ). this deviation allows extensive system power management configurations and guarantees an hdmi-compliant v (cec_con) on the connector. it also allows a backdrive-protected 125 ? a nominal cec pull-up which does not degrade the bus when powered down. by placing the cec microcontroller and v cc(5v0) input on a 5 v rail as shown in figure 22 , the cec microcontroller can communicate over cec for power commands. it can then enable the hdmi port via the cec_stby pin, as well as the rest of the system as needed. the cec buffer is always active as soon as both supply voltages are present. for details on the operating and standby modes of IP4788CZ32, see section 11.5 . fig 18. hot plug detect circuit 100 k 100 k esd_bypass hotplug_det_con hotplug_det_sys v cc(5v0) 018aaa107 IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 22 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection 11.8 backdrive protection the hdmi connector contains various signals which can partly supply current into an hdmi device which is powered down. typically, the ddc lines and the cec signals ca n force significant cu rrent back into the powered-down rails as shown in figure 20 , causing power-on rese t problems with the system, and possible damage. the IP4788CZ32 prevents this backdrive condition whenever the i/o voltage is greater than the local supply. fig 19. cec module v cc(5v0) 10 k 26 k esd_bypass cec_con cec_sys v cc(sys) 3v3 018aaa108 fig 20. generalized backdrive protection 018aaa109 hdmi asic hdmi source supply off 5 v backdrive current i 2 c-bus asic hdmi sink IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 23 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection 11.9 55 ma overcurrent / overvoltage ldo function to isolate faults from the source pow er supply while still meeting hdmi output specifications, IP4788CZ32 integrates a comp lete linear output overcurrent protection. the low dropout (ldo) design provides a low-co st solution requiring just a single output capacitor (1 ? f or higher, equivalent series resistance (esr) < 1 ? ), eliminating start-up and ripple concerns (see figure 21 ). a typical 100 mv v do overcurrent-only solution would require a 5.1 v ? 3 % input supply to guarantee 4.8 v to 5.3 v over 0 ma to 55 ma at the hdmi connector. the overcurrent / overvoltage feature of ip47 88cz32 allows the use of wider tolerance input supplies up to 6.5 v while still meeting t he 4.8 v-to-5.3 v output limit required by hdmi. so, for example, a cost-reduced 5.2 v ? 5 % or even a 5.5 v ? 10 % supply can be used with the IP4788CZ32. as with all the i/o pins, this block is esd-protected and also provides backdrive protection when a rogue hdmi sink powers the hdmi cable unexpectedly. fig 21. 5 v ldo with overcurrent / overvoltage protection esd_bypass hdmi_5v0_con 018aaa110 ddc/hpd buffers 60 ma overcurrent control cec 3v3 regulator cec buffer v cc(5v0) IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 24 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection 11.10 schematic view of application only a single external component (c o =1 ? f) is required to protect and interface the asic to a complete and compliant hdmi por t. the 100 nf esd bypass capacitor is optional. fig 22. schematic view of IP4788CZ32 application b 5 > ? > = ' ' ? .! ? ' = > = $& & 6 6 6 6 ! %. $" % &' ! %. $" 6 6 6 6 6 )(' ' $.. 6? ')( ' $.. b9 9 02*/11 :(*) (/+; IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 25 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection 11.11 typical application the IP4788CZ32 is designed to simplify routing to the hdmi connector and to ease the incorporation of high-level esd protec tion into delicately balanced high-speed tmds lines. these lines rely on ti ghtly controlled microstrip or stripline transmission lines with minimal impedance discontinuities. they can deteriorate return loss, increase deterministic jitter and generally erode overall link signal integrity. normally when designing the pcb with standard shunt esd clamps, careful consideration must be given to manual pre-compensat ion of the additional load of the added esd component. with the IP4788CZ32 tlcs, the esd suppressor is designed to maintain the characteristic impedance of the pcb microstrip or stripline. therefore the designer needs only to be concerned with the standard-controlled impedance of the unloaded pcb lines. this feature simplifies the task of the pcb designer, and minimizes the tuning cycles, which are sometimes required when pre-compensation misses the mark. a basic application diagram for the esd protection of an hdmi interface is shown in figure 23 for a type-a hdmi connector. the optimized dfn5050-32 pinning simplifies t he pcb design to keep the esd protection close to the connector where it can minimi ze the coupling of the esd pulse onto other lines in the system during a strike. due to the integrated pull-up and pull-down resistors, only two external capacitors are required to implement a fully compliant hdmi port. fig 23. application of the IP4788CZ32 sho wing optimized single-layer hdmi type-a connector routing 001aan367 IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 26 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection 12. package outline fig 24. package outline dfn5050-32 (sot617-3/hvqfn32) references outline version european projection issue date iec jedec jeita sot617-3 mo-220 sot617-3_po 11-06-14 11-06-21 unit (1) mm max nom min 0.85 0.05 0.00 0.2 5.1 4.9 3.75 3.45 5.1 4.9 3.75 3.45 0.5 3.5 a 1 dimensions note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. hvqfn32: plastic thermal enhanced very thin quad flat package; no leads; 32 terminals; body 5 x 5 x 0.85 mm sot617-3 bc 0.30 0.18 d (1) a (1) d h e (1) e h ee 1 e 2 l 3.5 vw 0.1 0.1 y 0.05 0.5 0.3 y 1 0.05 0 2.5 5 mm scale 1/2 e ac b v c w terminal 1 index area a a 1 detail x y y 1 c e l e h d h e e 1 b 916 32 25 24 17 8 1 x d e c b a e 2 terminal 1 index area 1/2 e IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 27 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection 13. soldering of smd packages this text provides a very brief insight into a complex technology. a more in-depth account of soldering ics can be found in application note an10365 ?surface mount reflow soldering description? . 13.1 introduction to soldering soldering is one of the most common methods through which packages are attached to printed circuit boards (pcbs), to form electr ical circuits. the soldered joint provides both the mechanical and the electrical connection. th ere is no single sold ering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mount devices (smds) are mixed on one printed wiring board; however, it is not suitable for fine pitch smds. reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization. 13.2 wave and reflow soldering wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. the wave soldering process is suitable for the following: ? through-hole components ? leaded or leadless smds, which are glued to the surface of the printed circuit board not all smds can be wave soldered. packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. also, leaded smds with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased pr obability of bridging. the reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. leaded packages, packages with solder balls, and leadless packages are all reflow solderable. key characteristics in both wave and reflow soldering are: ? board specifications, in cluding the board finish , solder masks and vias ? package footprints, including solder thieves and orientation ? the moisture sensitivit y level of the packages ? package placement ? inspection and repair ? lead-free soldering versus snpb soldering 13.3 wave soldering key characteristics in wave soldering are: ? process issues, such as application of adhe sive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave ? solder bath specifications, including temperature and impurities IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 28 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection 13.4 reflow soldering key characteristics in reflow soldering are: ? lead-free versus snpb solderi ng; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see figure 25 ) than a snpb process, thus reducing the process window ? solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board ? reflow temperature profile; this profile includ es preheat, reflow (in which the board is heated to the peak temperature) and cooling down. it is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). in addition, the peak temperature must be low enough that the packages and/or boards are not damaged. the peak temperature of the package depends on package thickness and volume and is classified in accordance with ta b l e 1 2 and 13 moisture sensitivity precautions, as indicat ed on the packing, must be respected at all times. studies have shown that small packages reach higher temperatures during reflow soldering, see figure 25 . table 12. snpb eutectic process (from j-std-020d) package thickness (mm) package reflow temperature ( ?c) volume (mm 3 ) < 350 ? 350 < 2.5 235 220 ? 2.5 220 220 table 13. lead-free process (from j-std-020d) package thickness (mm) package reflow temperature ( ?c) volume (mm 3 ) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245 IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 29 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection for further information on temperature profiles, refer to application note an10365 ?surface mount reflow soldering description? . 14. glossary hdmi sink ? device which receives hdmi signals for example, a tv set. hdmi source ? device which transmits hdmi si gnal for example, dvd player. msl: moisture sensitivity level fig 25. temperature profiles for large and small components 001aac844 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = msl limit, damage level peak temperature IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. IP4788CZ32 rev. 1 ? 8 march 2013 30 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection 15. revision history table 14. revision history document id release date data sheet status change notice supersedes IP4788CZ32 v.1 20130308 product data sheet - - IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 8 march 2013 31 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection 16. legal information 16.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 16.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 16.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such info rmation. nxp semiconductors takes no responsibility for the content in this document if provided by an information source outside of nxp semiconductors. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use ? nxp semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors and its suppliers accept no liability for inclusion and/or use of nxp semiconducto rs products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification. IP4788CZ32 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 8 march 2013 32 of 33 nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from competent authorities. non-automotive qualified products ? unless this data sheet expressly states that this specific nxp semicon ductors product is automotive qualified, the product is not suitable for automotive use. it is neither qualified nor tested in accordance with automotive testing or application requirements. nxp semiconductors accepts no liabili ty for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. in the event that customer uses t he product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without nxp semiconductors? warranty of the product for such automotive applicat ions, use and specifications, and (b) whenever customer uses the product for automotive applications beyond nxp semiconductors? specifications such use shall be solely at customer?s own risk, and (c) customer fully in demnifies nxp semi conductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive app lications beyond nxp semiconductors? standard warranty and nxp semiconduct ors? product specifications. 16.4 licenses 16.5 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 17. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com purchase of nxp ics with hdmi technology use of an nxp ic with hdmi technology in equipment that complies with the hdmi standard requires a license from hdmi licensing llc, 1060 e. arques avenue suite 100, sunnyvale ca 94085, usa, e-mail: admin@hdmi.org . nxp semiconductors IP4788CZ32 dvi and hdmi interface esd and overcurrent protection ? nxp b.v. 2013. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 8 march 2013 document identifier: IP4788CZ32 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 18. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6 8 static characteristics. . . . . . . . . . . . . . . . . . . . . 7 9 dynamic characteristics . . . . . . . . . . . . . . . . . 12 10 ac waveforms . . . . . . . . . . . . . . . . . . . . . . . . . 15 10.1 ddc propagation delay . . . . . . . . . . . . . . . . . 15 10.2 ddc transition time . . . . . . . . . . . . . . . . . . . . 16 11 application information. . . . . . . . . . . . . . . . . . 17 11.1 hdmi connector side esd protection . . . . . . . 17 11.2 tmds esd . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 11.3 operating and standby modes . . . . . . . . . . . . 18 11.4 ddc circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 11.5 logic low i 2 c voltage shifter . . . . . . . . . . . . . . 20 11.6 hot plug detect circuit and heac support . . . 21 11.7 cec . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 11.8 backdrive protection . . . . . . . . . . . . . . . . . . . . 22 11.9 55 ma overcurrent / overvoltage ldo function 23 11.10 schematic view of application . . . . . . . . . . . . 24 11.11 typical application . . . . . . . . . . . . . . . . . . . . . 25 12 package outline . . . . . . . . . . . . . . . . . . . . . . . . 26 13 soldering of smd packages . . . . . . . . . . . . . . 27 13.1 introduction to soldering . . . . . . . . . . . . . . . . . 27 13.2 wave and reflow soldering . . . . . . . . . . . . . . . 27 13.3 wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 27 13.4 reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 28 14 glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 15 revision history . . . . . . . . . . . . . . . . . . . . . . . . 30 16 legal information. . . . . . . . . . . . . . . . . . . . . . . 31 16.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 31 16.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 16.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 16.4 licenses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 16.5 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 32 17 contact information. . . . . . . . . . . . . . . . . . . . . 32 18 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 |
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